Updates
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182
fftw-3.3.10/dft/simd/common/t1fuv_6.c
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182
fftw-3.3.10/dft/simd/common/t1fuv_6.c
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/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/* This file was automatically generated --- DO NOT EDIT */
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/* Generated on Tue Sep 14 10:45:27 EDT 2021 */
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#include "dft/codelet-dft.h"
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#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
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/* Generated by: ../../../genfft/gen_twiddle_c.native -fma -simd -compact -variables 4 -pipeline-latency 8 -n 6 -name t1fuv_6 -include dft/simd/t1fu.h */
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/*
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* This function contains 23 FP additions, 18 FP multiplications,
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* (or, 17 additions, 12 multiplications, 6 fused multiply/add),
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* 19 stack variables, 2 constants, and 12 memory accesses
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*/
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#include "dft/simd/t1fu.h"
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static void t1fuv_6(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP500000000, +0.500000000000000000000000000000000000000000000);
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DVK(KP866025403, +0.866025403784438646763723170752936183471402627);
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{
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INT m;
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R *x;
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x = ri;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 10)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 10), MAKE_VOLATILE_STRIDE(6, rs)) {
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V T4, Ti, Te, Tk, T9, Tj, T1, T3, T2;
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T1 = LD(&(x[0]), ms, &(x[0]));
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T2 = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
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T3 = BYTWJ(&(W[TWVL * 4]), T2);
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T4 = VSUB(T1, T3);
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Ti = VADD(T1, T3);
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{
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V Tb, Td, Ta, Tc;
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Ta = LD(&(x[WS(rs, 4)]), ms, &(x[0]));
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Tb = BYTWJ(&(W[TWVL * 6]), Ta);
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Tc = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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Td = BYTWJ(&(W[0]), Tc);
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Te = VSUB(Tb, Td);
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Tk = VADD(Tb, Td);
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}
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{
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V T6, T8, T5, T7;
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T5 = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
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T6 = BYTWJ(&(W[TWVL * 2]), T5);
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T7 = LD(&(x[WS(rs, 5)]), ms, &(x[WS(rs, 1)]));
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T8 = BYTWJ(&(W[TWVL * 8]), T7);
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T9 = VSUB(T6, T8);
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Tj = VADD(T6, T8);
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}
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{
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V Th, Tf, Tg, Tn, Tl, Tm;
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Th = VMUL(LDK(KP866025403), VSUB(Te, T9));
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Tf = VADD(T9, Te);
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Tg = VFNMS(LDK(KP500000000), Tf, T4);
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ST(&(x[WS(rs, 3)]), VADD(T4, Tf), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 1)]), VFMAI(Th, Tg), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 5)]), VFNMSI(Th, Tg), ms, &(x[WS(rs, 1)]));
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Tn = VMUL(LDK(KP866025403), VSUB(Tk, Tj));
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Tl = VADD(Tj, Tk);
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Tm = VFNMS(LDK(KP500000000), Tl, Ti);
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ST(&(x[0]), VADD(Ti, Tl), ms, &(x[0]));
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ST(&(x[WS(rs, 4)]), VFMAI(Tn, Tm), ms, &(x[0]));
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ST(&(x[WS(rs, 2)]), VFNMSI(Tn, Tm), ms, &(x[0]));
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}
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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VTW(0, 2),
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VTW(0, 3),
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VTW(0, 4),
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VTW(0, 5),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 6, XSIMD_STRING("t1fuv_6"), twinstr, &GENUS, { 17, 12, 6, 0 }, 0, 0, 0 };
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void XSIMD(codelet_t1fuv_6) (planner *p) {
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X(kdft_dit_register) (p, t1fuv_6, &desc);
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}
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#else
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/* Generated by: ../../../genfft/gen_twiddle_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 6 -name t1fuv_6 -include dft/simd/t1fu.h */
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/*
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* This function contains 23 FP additions, 14 FP multiplications,
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* (or, 21 additions, 12 multiplications, 2 fused multiply/add),
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* 19 stack variables, 2 constants, and 12 memory accesses
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*/
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#include "dft/simd/t1fu.h"
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static void t1fuv_6(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP500000000, +0.500000000000000000000000000000000000000000000);
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DVK(KP866025403, +0.866025403784438646763723170752936183471402627);
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{
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INT m;
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R *x;
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x = ri;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 10)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 10), MAKE_VOLATILE_STRIDE(6, rs)) {
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V T4, Ti, Te, Tk, T9, Tj, T1, T3, T2;
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T1 = LD(&(x[0]), ms, &(x[0]));
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T2 = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
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T3 = BYTWJ(&(W[TWVL * 4]), T2);
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T4 = VSUB(T1, T3);
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Ti = VADD(T1, T3);
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{
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V Tb, Td, Ta, Tc;
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Ta = LD(&(x[WS(rs, 4)]), ms, &(x[0]));
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Tb = BYTWJ(&(W[TWVL * 6]), Ta);
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Tc = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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Td = BYTWJ(&(W[0]), Tc);
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Te = VSUB(Tb, Td);
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Tk = VADD(Tb, Td);
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}
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{
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V T6, T8, T5, T7;
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T5 = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
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T6 = BYTWJ(&(W[TWVL * 2]), T5);
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T7 = LD(&(x[WS(rs, 5)]), ms, &(x[WS(rs, 1)]));
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T8 = BYTWJ(&(W[TWVL * 8]), T7);
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T9 = VSUB(T6, T8);
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Tj = VADD(T6, T8);
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}
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{
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V Th, Tf, Tg, Tn, Tl, Tm;
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Th = VBYI(VMUL(LDK(KP866025403), VSUB(Te, T9)));
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Tf = VADD(T9, Te);
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Tg = VFNMS(LDK(KP500000000), Tf, T4);
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ST(&(x[WS(rs, 3)]), VADD(T4, Tf), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 1)]), VADD(Tg, Th), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 5)]), VSUB(Tg, Th), ms, &(x[WS(rs, 1)]));
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Tn = VBYI(VMUL(LDK(KP866025403), VSUB(Tk, Tj)));
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Tl = VADD(Tj, Tk);
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Tm = VFNMS(LDK(KP500000000), Tl, Ti);
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ST(&(x[0]), VADD(Ti, Tl), ms, &(x[0]));
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ST(&(x[WS(rs, 4)]), VADD(Tm, Tn), ms, &(x[0]));
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ST(&(x[WS(rs, 2)]), VSUB(Tm, Tn), ms, &(x[0]));
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}
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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VTW(0, 2),
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VTW(0, 3),
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VTW(0, 4),
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VTW(0, 5),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 6, XSIMD_STRING("t1fuv_6"), twinstr, &GENUS, { 21, 12, 2, 0 }, 0, 0, 0 };
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void XSIMD(codelet_t1fuv_6) (planner *p) {
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X(kdft_dit_register) (p, t1fuv_6, &desc);
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}
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#endif
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